PDL for FM0+  Version1.0
Peripheral Driverl Library for FM0+
C:/pdl_v10/template/source/pdl_user.h
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00001 /*******************************************************************************
00002 * Copyright (C) 2013 Spansion LLC. All Rights Reserved.
00003 *
00004 * This software is owned and published by:
00005 * Spansion LLC, 915 DeGuigne Dr. Sunnyvale, CA  94088-3453 ("Spansion").
00006 *
00007 * BY DOWNLOADING, INSTALLING OR USING THIS SOFTWARE, YOU AGREE TO BE BOUND
00008 * BY ALL THE TERMS AND CONDITIONS OF THIS AGREEMENT.
00009 *
00010 * This software contains source code for use with Spansion
00011 * components. This software is licensed by Spansion to be adapted only
00012 * for use in systems utilizing Spansion components. Spansion shall not be
00013 * responsible for misuse or illegal use of this software for devices not
00014 * supported herein.  Spansion is providing this software "AS IS" and will
00015 * not be responsible for issues arising from incorrect user implementation
00016 * of the software.
00017 *
00018 * SPANSION MAKES NO WARRANTY, EXPRESS OR IMPLIED, ARISING BY LAW OR OTHERWISE,
00019 * REGARDING THE SOFTWARE (INCLUDING ANY ACOOMPANYING WRITTEN MATERIALS),
00020 * ITS PERFORMANCE OR SUITABILITY FOR YOUR INTENDED USE, INCLUDING,
00021 * WITHOUT LIMITATION, THE IMPLIED WARRANTY OF MERCHANTABILITY, THE IMPLIED
00022 * WARRANTY OF FITNESS FOR A PARTICULAR PURPOSE OR USE, AND THE IMPLIED
00023 * WARRANTY OF NONINFRINGEMENT.
00024 * SPANSION SHALL HAVE NO LIABILITY (WHETHER IN CONTRACT, WARRANTY, TORT,
00025 * NEGLIGENCE OR OTHERWISE) FOR ANY DAMAGES WHATSOEVER (INCLUDING, WITHOUT
00026 * LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, BUSINESS INTERRUPTION,
00027 * LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) ARISING FROM USE OR
00028 * INABILITY TO USE THE SOFTWARE, INCLUDING, WITHOUT LIMITATION, ANY DIRECT,
00029 * INDIRECT, INCIDENTAL, SPECIAL OR CONSEQUENTIAL DAMAGES OR LOSS OF DATA,
00030 * SAVINGS OR PROFITS,
00031 * EVEN IF SPANSION HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
00032 * YOU ASSUME ALL RESPONSIBILITIES FOR SELECTION OF THE SOFTWARE TO ACHIEVE YOUR
00033 * INTENDED RESULTS, AND FOR THE INSTALLATION OF, USE OF, AND RESULTS OBTAINED
00034 * FROM, THE SOFTWARE.
00035 *
00036 * This software may be replicated in part or whole for the licensed use,
00037 * with the restriction that this Disclaimer and Copyright notice must be
00038 * included with each copy of this software, whether used in part or whole,
00039 * at all times.
00040 */
00041 /******************************************************************************/
00050 #ifndef __PDL_USER_H__
00051 #define __PDL_USER_H__
00052 
00053 #include "pdl.h"
00054 
00055 /******************************************************************************/
00056 /* Global pre-processor symbols/macros ('#define')                            */
00057 /******************************************************************************/
00058 
00067 // ADC
00068 #define PDL_PERIPHERAL_ENABLE_ADC0              PDL_OFF
00069 #define PDL_PERIPHERAL_ENABLE_ADC1              PDL_OFF
00070 #define PDL_PERIPHERAL_ENABLE_ADC2              PDL_OFF
00071 
00072 // Base Timers
00073 #define PDL_PERIPHERAL_ENABLE_BT0               PDL_OFF
00074 #define PDL_PERIPHERAL_ENABLE_BT1               PDL_OFF
00075 #define PDL_PERIPHERAL_ENABLE_BT2               PDL_OFF
00076 #define PDL_PERIPHERAL_ENABLE_BT3               PDL_OFF
00077 #define PDL_PERIPHERAL_ENABLE_BT4               PDL_OFF
00078 #define PDL_PERIPHERAL_ENABLE_BT5               PDL_OFF
00079 #define PDL_PERIPHERAL_ENABLE_BT6               PDL_OFF
00080 #define PDL_PERIPHERAL_ENABLE_BT7               PDL_OFF
00081 
00082 // Clock
00083 #define PDL_PERIPHERAL_ENABLE_CLK               PDL_OFF
00084 
00085 // CR Trimming
00086 #define PDL_PERIPHERAL_ENABLE_CR                PDL_OFF
00087 
00088 // Clock Supervisor
00089 #define PDL_PERIPHERAL_ENABLE_CSV               PDL_OFF
00090 
00091 // DAC
00092 #define PDL_PERIPHERAL_ENABLE_DAC               PDL_OFF
00093 
00094 // DMA
00095 #define PDL_PERIPHERAL_ENABLE_DMA0              PDL_OFF
00096 #define PDL_PERIPHERAL_ENABLE_DMA1              PDL_OFF
00097 #define PDL_PERIPHERAL_ENABLE_DMA2              PDL_OFF
00098 #define PDL_PERIPHERAL_ENABLE_DMA3              PDL_OFF
00099 
00100 // DSTC
00101 #define PDL_PERIPHERAL_ENABLE_DSTC              PDL_OFF
00102 
00103 // Dual Timer(s)
00104 #define PDL_PERIPHERAL_ENABLE_DT                PDL_OFF
00105 
00106 // External Interrupts
00107 #define PDL_PERIPHERAL_ENABLE_EXINT0            PDL_OFF
00108 #define PDL_PERIPHERAL_ENABLE_EXINT1            PDL_OFF
00109 #define PDL_PERIPHERAL_ENABLE_EXINT2            PDL_OFF
00110 #define PDL_PERIPHERAL_ENABLE_EXINT3            PDL_OFF
00111 #define PDL_PERIPHERAL_ENABLE_EXINT4            PDL_OFF
00112 #define PDL_PERIPHERAL_ENABLE_EXINT5            PDL_OFF
00113 #define PDL_PERIPHERAL_ENABLE_EXINT6            PDL_OFF
00114 #define PDL_PERIPHERAL_ENABLE_EXINT7            PDL_OFF
00115 #define PDL_PERIPHERAL_ENABLE_EXINT8            PDL_OFF
00116 #define PDL_PERIPHERAL_ENABLE_EXINT9            PDL_OFF
00117 #define PDL_PERIPHERAL_ENABLE_EXINT10           PDL_OFF
00118 #define PDL_PERIPHERAL_ENABLE_EXINT11           PDL_OFF
00119 #define PDL_PERIPHERAL_ENABLE_EXINT12           PDL_OFF
00120 #define PDL_PERIPHERAL_ENABLE_EXINT13           PDL_OFF
00121 #define PDL_PERIPHERAL_ENABLE_EXINT14           PDL_OFF
00122 #define PDL_PERIPHERAL_ENABLE_EXINT15           PDL_OFF
00123 #define PDL_PERIPHERAL_ENABLE_EXINT15           PDL_OFF
00124 #define PDL_PERIPHERAL_ENABLE_EXINT16           PDL_OFF
00125 #define PDL_PERIPHERAL_ENABLE_EXINT17           PDL_OFF
00126 #define PDL_PERIPHERAL_ENABLE_EXINT18           PDL_OFF
00127 #define PDL_PERIPHERAL_ENABLE_EXINT19           PDL_OFF
00128 #define PDL_PERIPHERAL_ENABLE_EXINT20           PDL_OFF
00129 #define PDL_PERIPHERAL_ENABLE_EXINT21           PDL_OFF
00130 #define PDL_PERIPHERAL_ENABLE_EXINT22           PDL_OFF
00131 #define PDL_PERIPHERAL_ENABLE_EXINT23           PDL_OFF
00132 #define PDL_PERIPHERAL_ENABLE_EXINT24           PDL_OFF
00133 #define PDL_PERIPHERAL_ENABLE_EXINT25           PDL_OFF
00134 #define PDL_PERIPHERAL_ENABLE_EXINT26           PDL_OFF
00135 #define PDL_PERIPHERAL_ENABLE_EXINT27           PDL_OFF
00136 #define PDL_PERIPHERAL_ENABLE_EXINT28           PDL_OFF
00137 #define PDL_PERIPHERAL_ENABLE_EXINT29           PDL_OFF
00138 #define PDL_PERIPHERAL_ENABLE_EXINT30           PDL_OFF
00139 #define PDL_PERIPHERAL_ENABLE_EXINT31           PDL_OFF
00140 
00141 // Flash routines
00142 #define PDL_PERIPHERAL_ENABLE_FLASH             PDL_OFF
00143 
00144 // GPIO header inclusion
00145 #define PDL_PERIPHERAL_ENABLE_GPIO              PDL_OFF
00146 
00147 // HDMI routines
00148 #define PDL_PERIPHERAL_ENABLE_HDMI              PDL_OFF
00149 
00150 // LPM
00151 #define PDL_PERIPHERAL_ENABLE_LPM               PDL_OFF
00152 
00153 // Low Voltage Detection
00154 #define PDL_PERIPHERAL_ENABLE_LVD               PDL_OFF
00155 
00156 // Multi Function Serial Interfaces
00157 #define PDL_PERIPHERAL_ENABLE_MFS0              PDL_OFF
00158 #define PDL_PERIPHERAL_ENABLE_MFS1              PDL_OFF
00159 #define PDL_PERIPHERAL_ENABLE_MFS2              PDL_OFF
00160 #define PDL_PERIPHERAL_ENABLE_MFS3              PDL_OFF
00161 #define PDL_PERIPHERAL_ENABLE_MFS4              PDL_OFF
00162 #define PDL_PERIPHERAL_ENABLE_MFS5              PDL_OFF
00163 #define PDL_PERIPHERAL_ENABLE_MFS6              PDL_OFF
00164 #define PDL_PERIPHERAL_ENABLE_MFS7              PDL_OFF
00165 #define PDL_PERIPHERAL_ENABLE_MFS8              PDL_OFF
00166 #define PDL_PERIPHERAL_ENABLE_MFS9              PDL_OFF
00167 #define PDL_PERIPHERAL_ENABLE_MFS10             PDL_OFF
00168 #define PDL_PERIPHERAL_ENABLE_MFS11             PDL_OFF
00169 #define PDL_PERIPHERAL_ENABLE_MFS12             PDL_OFF
00170 #define PDL_PERIPHERAL_ENABLE_MFS13             PDL_OFF
00171 #define PDL_PERIPHERAL_ENABLE_MFS14             PDL_OFF
00172 #define PDL_PERIPHERAL_ENABLE_MFS15             PDL_OFF
00173 
00174 // Multi Function Timer Interfaces
00175 #define PDL_PERIPHERAL_ENABLE_MFT0_FRT          PDL_OFF
00176 #define PDL_PERIPHERAL_ENABLE_MFT0_OCU          PDL_OFF
00177 #define PDL_PERIPHERAL_ENABLE_MFT0_WFG          PDL_OFF
00178 #define PDL_PERIPHERAL_ENABLE_MFT0_ICU          PDL_OFF
00179 #define PDL_PERIPHERAL_ENABLE_MFT0_ADCMP        PDL_OFF
00180 
00181 #define PDL_PERIPHERAL_ENABLE_MFT1_FRT          PDL_OFF
00182 #define PDL_PERIPHERAL_ENABLE_MFT1_OCU          PDL_OFF
00183 #define PDL_PERIPHERAL_ENABLE_MFT1_WFG          PDL_OFF
00184 #define PDL_PERIPHERAL_ENABLE_MFT1_ICU          PDL_OFF
00185 #define PDL_PERIPHERAL_ENABLE_MFT1_ADCMP        PDL_OFF
00186 
00187 #define PDL_PERIPHERAL_ENABLE_MFT2_FRT          PDL_OFF
00188 #define PDL_PERIPHERAL_ENABLE_MFT2_OCU          PDL_OFF
00189 #define PDL_PERIPHERAL_ENABLE_MFT2_WFG          PDL_OFF
00190 #define PDL_PERIPHERAL_ENABLE_MFT2_ICU          PDL_OFF
00191 #define PDL_PERIPHERAL_ENABLE_MFT2_ADCMP        PDL_OFF
00192 
00193 // PPG
00194 #define PDL_PERIPHERAL_ENABLE_PPG               PDL_OFF
00195 
00196 // NMI
00197 #define PDL_PERIPHERAL_ENABLE_NMI               PDL_OFF
00198 
00199 // Quad Decoder
00200 #define PDL_PERIPHERAL_ENABLE_QPRC0             PDL_OFF
00201 #define PDL_PERIPHERAL_ENABLE_QPRC1             PDL_OFF
00202 #define PDL_PERIPHERAL_ENABLE_QPRC2             PDL_OFF
00203 #define PDL_PERIPHERAL_ENABLE_QPRC3             PDL_OFF
00204 
00205 // Reset Cause
00206 #define PDL_PERIPHERAL_ENABLE_RESET             PDL_OFF
00207 
00208 // Real Time Clock
00209 #define PDL_PERIPHERAL_ENABLE_RTC               PDL_OFF
00210 
00211 // Unique ID
00212 #define PDL_PERIPHERAL_ENABLE_UID               PDL_OFF
00213 
00214 // Watch Counter
00215 #define PDL_PERIPHERAL_ENABLE_WC                PDL_OFF
00216 
00217 // Watchdog Timers
00218 #define PDL_PERIPHERAL_ENABLE_HWWDG             PDL_OFF
00219 #define PDL_PERIPHERAL_ENABLE_SWWDG             PDL_OFF
00220 
00228 // ADC
00229 #define PDL_INTERRUPT_ENABLE_ADC0              PDL_OFF
00230 #define PDL_INTERRUPT_ENABLE_ADC1              PDL_OFF
00231 #define PDL_INTERRUPT_ENABLE_ADC2              PDL_OFF
00232 
00233 // Base Timers
00234 #define PDL_INTERRUPT_ENABLE_BT0               PDL_OFF
00235 #define PDL_INTERRUPT_ENABLE_BT1               PDL_OFF
00236 #define PDL_INTERRUPT_ENABLE_BT2               PDL_OFF
00237 #define PDL_INTERRUPT_ENABLE_BT3               PDL_OFF
00238 #define PDL_INTERRUPT_ENABLE_BT4               PDL_OFF
00239 #define PDL_INTERRUPT_ENABLE_BT5               PDL_OFF
00240 #define PDL_INTERRUPT_ENABLE_BT6               PDL_OFF
00241 #define PDL_INTERRUPT_ENABLE_BT7               PDL_OFF
00242 
00243 // Clock
00244 #define PDL_INTERRUPT_ENABLE_CLK               PDL_OFF
00245 
00246 // Clock Supervisor
00247 #define PDL_INTERRUPT_ENABLE_CSV               PDL_OFF
00248 
00249 // DMA
00250 #define PDL_INTERRUPT_ENABLE_DMA0              PDL_OFF
00251 #define PDL_INTERRUPT_ENABLE_DMA1              PDL_OFF
00252 #define PDL_INTERRUPT_ENABLE_DMA2              PDL_OFF
00253 #define PDL_INTERRUPT_ENABLE_DMA3              PDL_OFF
00254 
00255 // Dual Timer(s)
00256 #define PDL_INTERRUPT_ENABLE_DT                PDL_OFF
00257 
00258 // External Interrupts (automatically set by peripheral enable)
00259 #if (PDL_PERIPHERAL_ENABLE_EXINT0 == PDL_ON)
00260 #define PDL_INTERRUPT_ENABLE_EXINT0            PDL_ON
00261 #else
00262 #define PDL_INTERRUPT_ENABLE_EXINT0            PDL_OFF
00263 #endif
00264 #if (PDL_PERIPHERAL_ENABLE_EXINT1 == PDL_ON)
00265 #define PDL_INTERRUPT_ENABLE_EXINT1            PDL_ON
00266 #else
00267 #define PDL_INTERRUPT_ENABLE_EXINT1            PDL_OFF
00268 #endif
00269 #if (PDL_PERIPHERAL_ENABLE_EXINT2 == PDL_ON)
00270 #define PDL_INTERRUPT_ENABLE_EXINT2            PDL_ON
00271 #else
00272 #define PDL_INTERRUPT_ENABLE_EXINT2            PDL_OFF
00273 #endif
00274 #if (PDL_PERIPHERAL_ENABLE_EXINT3 == PDL_ON)
00275 #define PDL_INTERRUPT_ENABLE_EXINT3            PDL_ON
00276 #else
00277 #define PDL_INTERRUPT_ENABLE_EXINT3            PDL_OFF
00278 #endif
00279 #if (PDL_PERIPHERAL_ENABLE_EXINT4 == PDL_ON)
00280 #define PDL_INTERRUPT_ENABLE_EXINT4            PDL_ON
00281 #else
00282 #define PDL_INTERRUPT_ENABLE_EXINT4            PDL_OFF
00283 #endif
00284 #if (PDL_PERIPHERAL_ENABLE_EXINT5 == PDL_ON)
00285 #define PDL_INTERRUPT_ENABLE_EXINT5            PDL_ON
00286 #else
00287 #define PDL_INTERRUPT_ENABLE_EXINT5            PDL_OFF
00288 #endif
00289 #if (PDL_PERIPHERAL_ENABLE_EXINT6 == PDL_ON)
00290 #define PDL_INTERRUPT_ENABLE_EXINT6            PDL_ON
00291 #else
00292 #define PDL_INTERRUPT_ENABLE_EXINT6            PDL_OFF
00293 #endif
00294 #if (PDL_PERIPHERAL_ENABLE_EXINT7 == PDL_ON)
00295 #define PDL_INTERRUPT_ENABLE_EXINT7            PDL_ON
00296 #else
00297 #define PDL_INTERRUPT_ENABLE_EXINT7            PDL_OFF
00298 #endif
00299 #if (PDL_PERIPHERAL_ENABLE_EXINT8 == PDL_ON)
00300 #define PDL_INTERRUPT_ENABLE_EXINT8            PDL_ON
00301 #else
00302 #define PDL_INTERRUPT_ENABLE_EXINT8            PDL_OFF
00303 #endif
00304 #if (PDL_PERIPHERAL_ENABLE_EXINT9 == PDL_ON)
00305 #define PDL_INTERRUPT_ENABLE_EXINT9            PDL_ON
00306 #else
00307 #define PDL_INTERRUPT_ENABLE_EXINT9            PDL_OFF
00308 #endif
00309 #if (PDL_PERIPHERAL_ENABLE_EXINT10 == PDL_ON)
00310 #define PDL_INTERRUPT_ENABLE_EXINT10           PDL_ON
00311 #else
00312 #define PDL_INTERRUPT_ENABLE_EXINT10           PDL_OFF
00313 #endif
00314 #if (PDL_PERIPHERAL_ENABLE_EXINT11 == PDL_ON)
00315 #define PDL_INTERRUPT_ENABLE_EXINT11           PDL_ON
00316 #else
00317 #define PDL_INTERRUPT_ENABLE_EXINT11           PDL_OFF
00318 #endif
00319 #if (PDL_PERIPHERAL_ENABLE_EXINT12 == PDL_ON)
00320 #define PDL_INTERRUPT_ENABLE_EXINT12           PDL_ON
00321 #else
00322 #define PDL_INTERRUPT_ENABLE_EXINT12           PDL_OFF
00323 #endif
00324 #if (PDL_PERIPHERAL_ENABLE_EXINT13 == PDL_ON)
00325 #define PDL_INTERRUPT_ENABLE_EXINT13           PDL_ON
00326 #else
00327 #define PDL_INTERRUPT_ENABLE_EXINT13           PDL_OFF
00328 #endif
00329 #if (PDL_PERIPHERAL_ENABLE_EXINT14 == PDL_ON)
00330 #define PDL_INTERRUPT_ENABLE_EXINT14           PDL_ON
00331 #else
00332 #define PDL_INTERRUPT_ENABLE_EXINT14           PDL_OFF
00333 #endif
00334 #if (PDL_PERIPHERAL_ENABLE_EXINT15 == PDL_ON)
00335 #define PDL_INTERRUPT_ENABLE_EXINT15           PDL_ON
00336 #else
00337 #define PDL_INTERRUPT_ENABLE_EXINT15           PDL_OFF
00338 #endif
00339 #if (PDL_PERIPHERAL_ENABLE_EXINT16== PDL_ON)
00340 #define PDL_INTERRUPT_ENABLE_EXINT16           PDL_ON
00341 #else
00342 #define PDL_INTERRUPT_ENABLE_EXINT16           PDL_OFF
00343 #endif
00344 #if (PDL_PERIPHERAL_ENABLE_EXINT17 == PDL_ON)
00345 #define PDL_INTERRUPT_ENABLE_EXINT17           PDL_ON
00346 #else
00347 #define PDL_INTERRUPT_ENABLE_EXINT17           PDL_OFF
00348 #endif
00349 #if (PDL_PERIPHERAL_ENABLE_EXINT18 == PDL_ON)
00350 #define PDL_INTERRUPT_ENABLE_EXINT18           PDL_ON
00351 #else
00352 #define PDL_INTERRUPT_ENABLE_EXINT18           PDL_OFF
00353 #endif
00354 #if (PDL_PERIPHERAL_ENABLE_EXINT19 == PDL_ON)
00355 #define PDL_INTERRUPT_ENABLE_EXINT19           PDL_ON
00356 #else
00357 #define PDL_INTERRUPT_ENABLE_EXINT19           PDL_OFF
00358 #endif
00359 #if (PDL_PERIPHERAL_ENABLE_EXINT20 == PDL_ON)
00360 #define PDL_INTERRUPT_ENABLE_EXINT20           PDL_ON
00361 #else
00362 #define PDL_INTERRUPT_ENABLE_EXINT20           PDL_OFF
00363 #endif
00364 #if (PDL_PERIPHERAL_ENABLE_EXINT21 == PDL_ON)
00365 #define PDL_INTERRUPT_ENABLE_EXINT21           PDL_ON
00366 #else
00367 #define PDL_INTERRUPT_ENABLE_EXINT21           PDL_OFF
00368 #endif
00369 #if (PDL_PERIPHERAL_ENABLE_EXINT22 == PDL_ON)
00370 #define PDL_INTERRUPT_ENABLE_EXINT22           PDL_ON
00371 #else
00372 #define PDL_INTERRUPT_ENABLE_EXINT22           PDL_OFF
00373 #endif
00374 #if (PDL_PERIPHERAL_ENABLE_EXINT23 == PDL_ON)
00375 #define PDL_INTERRUPT_ENABLE_EXINT23           PDL_ON
00376 #else
00377 #define PDL_INTERRUPT_ENABLE_EXINT23           PDL_OFF
00378 #endif
00379 #if (PDL_PERIPHERAL_ENABLE_EXINT24 == PDL_ON)
00380 #define PDL_INTERRUPT_ENABLE_EXINT24           PDL_ON
00381 #else
00382 #define PDL_INTERRUPT_ENABLE_EXINT24           PDL_OFF
00383 #endif
00384 #if (PDL_PERIPHERAL_ENABLE_EXINT25 == PDL_ON)
00385 #define PDL_INTERRUPT_ENABLE_EXINT25           PDL_ON
00386 #else
00387 #define PDL_INTERRUPT_ENABLE_EXINT25           PDL_OFF
00388 #endif
00389 #if (PDL_PERIPHERAL_ENABLE_EXINT26 == PDL_ON)
00390 #define PDL_INTERRUPT_ENABLE_EXINT26           PDL_ON
00391 #else
00392 #define PDL_INTERRUPT_ENABLE_EXINT26           PDL_OFF
00393 #endif
00394 #if (PDL_PERIPHERAL_ENABLE_EXINT27 == PDL_ON)
00395 #define PDL_INTERRUPT_ENABLE_EXINT27           PDL_ON
00396 #else
00397 #define PDL_INTERRUPT_ENABLE_EXINT27           PDL_OFF
00398 #endif
00399 #if (PDL_PERIPHERAL_ENABLE_EXINT28 == PDL_ON)
00400 #define PDL_INTERRUPT_ENABLE_EXINT28           PDL_ON
00401 #else
00402 #define PDL_INTERRUPT_ENABLE_EXINT28           PDL_OFF
00403 #endif
00404 #if (PDL_PERIPHERAL_ENABLE_EXINT29 == PDL_ON)
00405 #define PDL_INTERRUPT_ENABLE_EXINT29           PDL_ON
00406 #else
00407 #define PDL_INTERRUPT_ENABLE_EXINT29           PDL_OFF
00408 #endif
00409 #if (PDL_PERIPHERAL_ENABLE_EXINT30 == PDL_ON)
00410 #define PDL_INTERRUPT_ENABLE_EXINT30           PDL_ON
00411 #else
00412 #define PDL_INTERRUPT_ENABLE_EXINT30           PDL_OFF
00413 #endif
00414 #if (PDL_PERIPHERAL_ENABLE_EXINT31 == PDL_ON)
00415 #define PDL_INTERRUPT_ENABLE_EXINT31           PDL_ON
00416 #else
00417 #define PDL_INTERRUPT_ENABLE_EXINT31           PDL_OFF
00418 #endif
00419 
00420 // HDMI routines
00421 #define PDL_INTERRUPT_ENABLE_HDMI              PDL_OFF
00422 
00423 // Flash
00424 #define PDL_INTERRUPT_ENABLE_FLASH             PDL_OFF
00425 
00426 // LCD
00427 #define PDL_INTERRUPT_ENABLE_LCD               PDL_OFF
00428 
00429 // Low Voltage Detection
00430 #define PDL_INTERRUPT_ENABLE_LVD               PDL_OFF
00431 
00432 // Multi Function Serial Interfaces
00433 #define PDL_INTERRUPT_ENABLE_MFS0              PDL_OFF
00434 #define PDL_INTERRUPT_ENABLE_MFS1              PDL_OFF
00435 #define PDL_INTERRUPT_ENABLE_MFS2              PDL_OFF
00436 #define PDL_INTERRUPT_ENABLE_MFS3              PDL_OFF
00437 #define PDL_INTERRUPT_ENABLE_MFS4              PDL_OFF
00438 #define PDL_INTERRUPT_ENABLE_MFS5              PDL_OFF
00439 #define PDL_INTERRUPT_ENABLE_MFS6              PDL_OFF
00440 #define PDL_INTERRUPT_ENABLE_MFS7              PDL_OFF
00441 #define PDL_INTERRUPT_ENABLE_MFS8              PDL_OFF
00442 #define PDL_INTERRUPT_ENABLE_MFS9              PDL_OFF
00443 #define PDL_INTERRUPT_ENABLE_MFS10             PDL_OFF
00444 #define PDL_INTERRUPT_ENABLE_MFS11             PDL_OFF
00445 #define PDL_INTERRUPT_ENABLE_MFS12             PDL_OFF
00446 #define PDL_INTERRUPT_ENABLE_MFS13             PDL_OFF
00447 #define PDL_INTERRUPT_ENABLE_MFS14             PDL_OFF
00448 #define PDL_INTERRUPT_ENABLE_MFS15             PDL_OFF
00449 
00450 // Multi Function Timer Interfaces
00451 #define PDL_INTERRUPT_ENABLE_MFT0_FRT          PDL_OFF
00452 #define PDL_INTERRUPT_ENABLE_MFT0_OCU          PDL_OFF
00453 #define PDL_INTERRUPT_ENABLE_MFT0_WFG          PDL_OFF
00454 #define PDL_INTERRUPT_ENABLE_MFT0_ICU          PDL_OFF
00455 
00456 #define PDL_INTERRUPT_ENABLE_MFT1_FRT          PDL_OFF
00457 #define PDL_INTERRUPT_ENABLE_MFT1_OCU          PDL_OFF
00458 #define PDL_INTERRUPT_ENABLE_MFT1_WFG          PDL_OFF
00459 #define PDL_INTERRUPT_ENABLE_MFT1_ICU          PDL_OFF
00460 
00461 #define PDL_INTERRUPT_ENABLE_MFT2_FRT          PDL_OFF
00462 #define PDL_INTERRUPT_ENABLE_MFT2_OCU          PDL_OFF
00463 #define PDL_INTERRUPT_ENABLE_MFT2_WFG          PDL_OFF
00464 #define PDL_INTERRUPT_ENABLE_MFT2_ICU          PDL_OFF
00465 
00466 // NMI
00467 #if (PDL_PERIPHERAL_ENABLE_NMI== PDL_ON)
00468 #define PDL_INTERRUPT_ENABLE_NMI               PDL_ON
00469 #else
00470 #define PDL_INTERRUPT_ENABLE_NMI               PDL_OFF
00471 #endif
00472 
00473 // PPG
00474 #define PDL_INTERRUPT_ENABLE_PPG               PDL_OFF
00475 
00476 // Quad Decoder
00477 #define PDL_INTERRUPT_ENABLE_QPRC0             PDL_OFF
00478 #define PDL_INTERRUPT_ENABLE_QPRC1             PDL_OFF
00479 #define PDL_INTERRUPT_ENABLE_QPRC2             PDL_OFF
00480 #define PDL_INTERRUPT_ENABLE_QPRC3             PDL_OFF
00481 
00482 // Real Time Clock
00483 #define PDL_INTERRUPT_ENABLE_RTC               PDL_OFF
00484 
00485 // Watch Counter
00486 #define PDL_INTERRUPT_ENABLE_WC                PDL_OFF
00487 
00488 // Watchdog Timers
00489 #define PDL_INTERRUPT_ENABLE_HWWDG             PDL_OFF
00490 #define PDL_INTERRUPT_ENABLE_SWWDG             PDL_OFF
00491 
00498  // Analog Digital Converters
00499 #define PDL_IRQ_LEVEL_ADC0                      15u
00500 #define PDL_IRQ_LEVEL_ADC1                      15u
00501 #define PDL_IRQ_LEVEL_ADC2_LCD                  15u
00502 
00503 // Base Timers
00504 #define PDL_IRQ_LEVEL_BT0_7_FLASH               15u
00505 
00506 // Watch Counter / Clock Stabilization Irq
00507 #define PDL_IRQ_LEVEL_CLK_WC_RTC                15u
00508 
00509 // Clock Supervisor/Watch Counter/Real-Time Clock
00510 #define PDL_IRQ_LEVEL_CSV                       15u
00511 
00512 // Dual Timer/QPRC
00513 #define PDL_IRQ_LEVEL_DT_QPRC                   15u
00514 
00515 // External Interrupts + NMI
00516 #define PDL_IRQ_LEVEL_EXINT0_7                  15u
00517 #define PDL_IRQ_LEVEL_EXINT8_31                 15u
00518 
00519 // Low Voltage Detection Interrupt
00520 #define PDL_IRQ_LEVEL_LVD                       15u
00521 
00522 // Multi Function Serial Interfaces
00523 #define PDL_IRQ_LEVEL_MFS0_8_TX                 15u
00524 #define PDL_IRQ_LEVEL_MFS0_8_RX                 15u
00525 #define PDL_IRQ_LEVEL_MFS1_9_TX                 15u
00526 #define PDL_IRQ_LEVEL_MFS1_9_RX                 15u
00527 #define PDL_IRQ_LEVEL_MFS2_10_TX                15u
00528 #define PDL_IRQ_LEVEL_MFS2_10_RX                15u
00529 #define PDL_IRQ_LEVEL_MFS3_11_TX                15u
00530 #define PDL_IRQ_LEVEL_MFS3_11_RX                15u
00531 #define PDL_IRQ_LEVEL_MFS4_12_TX                15u
00532 #define PDL_IRQ_LEVEL_MFS4_12_RX                15u
00533 #define PDL_IRQ_LEVEL_MFS5_13_TX                15u
00534 #define PDL_IRQ_LEVEL_MFS5_13_RX                15u
00535 #define PDL_IRQ_LEVEL_MFS6_14_TX_DMA1           15u
00536 #define PDL_IRQ_LEVEL_MFS6_14_RX_DMA0           15u
00537 #define PDL_IRQ_LEVEL_MFS7_15_TX_DMA3           15u
00538 #define PDL_IRQ_LEVEL_MFS7_15_RX_DMA2           15u
00539 
00540 // Multi Function Timer Interrupts
00541 #define PDL_IRQ_LEVEL_MFT_FRT                   15u
00542 #define PDL_IRQ_LEVEL_MFT_OCU                   15u
00543 #define PDL_IRQ_LEVEL_MFT_WFG                   15u
00544 #define PDL_IRQ_LEVEL_MFT_ICU                   15u
00545 
00546 // NMI
00547 #define PDL_IRQ_LEVEL_NMI                       15u
00548 
00549 // PPG Interrupts
00550 #define PDL_IRQ_LEVEL_PPG                       15u
00551 
00552 // Watchdog Timers
00553 #define PDL_IRQ_LEVEL_HWWDG                     15u
00554 #define PDL_IRQ_LEVEL_SWWDG                     15u
00555 
00566 // Activate code in adc.c if one or more are set to PDL_ON
00567 #if (PDL_PERIPHERAL_ENABLE_ADC0 == PDL_ON) || \
00568     (PDL_PERIPHERAL_ENABLE_ADC1 == PDL_ON) || \
00569     (PDL_PERIPHERAL_ENABLE_ADC2 == PDL_ON)
00570     #define PDL_PERIPHERAL_ADC_ACTIVE
00571 #endif
00572 
00573 // Activate code in bt.c if one or more are set to PDL_ON
00574 #if (PDL_PERIPHERAL_ENABLE_BT0 == PDL_ON) || \
00575     (PDL_PERIPHERAL_ENABLE_BT1 == PDL_ON) || \
00576     (PDL_PERIPHERAL_ENABLE_BT2 == PDL_ON) || \
00577     (PDL_PERIPHERAL_ENABLE_BT3 == PDL_ON) || \
00578     (PDL_PERIPHERAL_ENABLE_BT4 == PDL_ON) || \
00579     (PDL_PERIPHERAL_ENABLE_BT5 == PDL_ON) || \
00580     (PDL_PERIPHERAL_ENABLE_BT6 == PDL_ON) || \
00581     (PDL_PERIPHERAL_ENABLE_BT7 == PDL_ON)
00582     #define PDL_PERIPHERAL_BT_ACTIVE
00583 #endif
00584 
00585 // Activate code in crc.c if set to PDL_ON
00586 #if (PDL_PERIPHERAL_ENABLE_CRC == PDL_ON)
00587     #define PDL_PERIPHERAL_CRC_ACTIVE
00588 #endif
00589 
00590 // Activate code in clk.c if set to PDL_ON or WC enabled
00591 #if (PDL_PERIPHERAL_ENABLE_CLK == PDL_ON)
00592     #define PDL_PERIPHERAL_CLK_ACTIVE
00593 #endif
00594 
00595 // Activate code in crtrim.c if set to PDL_ON
00596 #if (PDL_PERIPHERAL_ENABLE_CR == PDL_ON)
00597     #define PDL_PERIPHERAL_CR_ACTIVE
00598 #endif
00599 
00600 // Activate code in csv.c if set to PDL_ON
00601 #if (PDL_PERIPHERAL_ENABLE_CSV == PDL_ON)
00602     #define PDL_PERIPHERAL_CSV_ACTIVE
00603 #endif
00604 
00605 // Activate code in dac.c if one or more are set to PDL_ON
00606 #if (PDL_PERIPHERAL_ENABLE_DAC == PDL_ON)
00607     #define PDL_PERIPHERAL_DAC_ACTIVE
00608 #endif
00609 
00610 // Activate code for dma.c
00611 #if ((PDL_PERIPHERAL_ENABLE_DMA0 == PDL_ON) || \
00612      (PDL_PERIPHERAL_ENABLE_DMA1 == PDL_ON) || \
00613      (PDL_PERIPHERAL_ENABLE_DMA2 == PDL_ON) || \
00614      (PDL_PERIPHERAL_ENABLE_DMA3 == PDL_ON) )
00615     #define PDL_PERIPHERAL_DMA_ACTIVE
00616 #endif
00617 
00618 // Activate code in dt.c if one or more are set to PDL_ON
00619 #if (PDL_PERIPHERAL_ENABLE_DT == PDL_ON)
00620     #define PDL_PERIPHERAL_DT_ACTIVE
00621 #endif
00622 
00623 // Activate code in exint.c if one or more are set to PDL_ON
00624 #if (PDL_PERIPHERAL_ENABLE_EXINT0           == PDL_ON) || \
00625     (PDL_PERIPHERAL_ENABLE_EXINT1           == PDL_ON) || \
00626     (PDL_PERIPHERAL_ENABLE_EXINT2           == PDL_ON) || \
00627     (PDL_PERIPHERAL_ENABLE_EXINT3           == PDL_ON) || \
00628     (PDL_PERIPHERAL_ENABLE_EXINT4           == PDL_ON) || \
00629     (PDL_PERIPHERAL_ENABLE_EXINT5           == PDL_ON) || \
00630     (PDL_PERIPHERAL_ENABLE_EXINT6           == PDL_ON) || \
00631     (PDL_PERIPHERAL_ENABLE_EXINT7           == PDL_ON) || \
00632     (PDL_PERIPHERAL_ENABLE_EXINT8           == PDL_ON) || \
00633     (PDL_PERIPHERAL_ENABLE_EXINT9           == PDL_ON) || \
00634     (PDL_PERIPHERAL_ENABLE_EXINT10          == PDL_ON) || \
00635     (PDL_PERIPHERAL_ENABLE_EXINT11          == PDL_ON) || \
00636     (PDL_PERIPHERAL_ENABLE_EXINT12          == PDL_ON) || \
00637     (PDL_PERIPHERAL_ENABLE_EXINT13          == PDL_ON) || \
00638     (PDL_PERIPHERAL_ENABLE_EXINT14          == PDL_ON) || \
00639     (PDL_PERIPHERAL_ENABLE_EXINT15          == PDL_ON) || \
00640     (PDL_PERIPHERAL_ENABLE_EXINT16          == PDL_ON) || \
00641     (PDL_PERIPHERAL_ENABLE_EXINT17          == PDL_ON) || \
00642     (PDL_PERIPHERAL_ENABLE_EXINT18          == PDL_ON) || \
00643     (PDL_PERIPHERAL_ENABLE_EXINT19          == PDL_ON) || \
00644     (PDL_PERIPHERAL_ENABLE_EXINT20          == PDL_ON) || \
00645     (PDL_PERIPHERAL_ENABLE_EXINT21          == PDL_ON) || \
00646     (PDL_PERIPHERAL_ENABLE_EXINT22          == PDL_ON) || \
00647     (PDL_PERIPHERAL_ENABLE_EXINT23          == PDL_ON) || \
00648     (PDL_PERIPHERAL_ENABLE_EXINT24          == PDL_ON) || \
00649     (PDL_PERIPHERAL_ENABLE_EXINT25          == PDL_ON) || \
00650     (PDL_PERIPHERAL_ENABLE_EXINT26          == PDL_ON) || \
00651     (PDL_PERIPHERAL_ENABLE_EXINT27          == PDL_ON) || \
00652     (PDL_PERIPHERAL_ENABLE_EXINT28          == PDL_ON) || \
00653     (PDL_PERIPHERAL_ENABLE_EXINT29          == PDL_ON) || \
00654     (PDL_PERIPHERAL_ENABLE_EXINT30          == PDL_ON) || \
00655     (PDL_PERIPHERAL_ENABLE_EXINT31          == PDL_ON)
00656     #define PDL_PERIPHERAL_EXINT_ACTIVE
00657 #endif
00658 
00659 // Activate code in flash.c if set to PDL_ON
00660 #if (PDL_PERIPHERAL_ENABLE_FLASH        == PDL_ON)
00661     #define PDL_PERIPHERAL_FLASH_ACTIVE
00662 #endif
00663 
00664 // Activate code in gpio.c if set to PDL_ON
00665 #if (PDL_PERIPHERAL_ENABLE_GPIO == PDL_ON)
00666     #define PDL_PERIPHERAL_GPIO_ACTIVE
00667 #endif
00668 
00669 // Activate code in lpm.c if set to PDL_ON
00670 #if (PDL_PERIPHERAL_ENABLE_LPM == PDL_ON)
00671     #define PDL_PERIPHERAL_LPM_ACTIVE
00672 #endif
00673 
00674 // Activate code in lvd.c if set to PDL_ON
00675 #if (PDL_PERIPHERAL_ENABLE_LVD == PDL_ON)
00676     #define PDL_PERIPHERAL_LVD_ACTIVE
00677 #endif
00678 
00679 // Activate code in mfs.c if one or more are set to PDL_ON
00680 #if (PDL_PERIPHERAL_ENABLE_MFS0  == PDL_ON) || \
00681     (PDL_PERIPHERAL_ENABLE_MFS1  == PDL_ON) || \
00682     (PDL_PERIPHERAL_ENABLE_MFS2  == PDL_ON) || \
00683     (PDL_PERIPHERAL_ENABLE_MFS3  == PDL_ON) || \
00684     (PDL_PERIPHERAL_ENABLE_MFS4  == PDL_ON) || \
00685     (PDL_PERIPHERAL_ENABLE_MFS5  == PDL_ON) || \
00686     (PDL_PERIPHERAL_ENABLE_MFS6  == PDL_ON) || \
00687     (PDL_PERIPHERAL_ENABLE_MFS7  == PDL_ON) || \
00688     (PDL_PERIPHERAL_ENABLE_MFS8  == PDL_ON) || \
00689     (PDL_PERIPHERAL_ENABLE_MFS9  == PDL_ON) || \
00690     (PDL_PERIPHERAL_ENABLE_MFS10 == PDL_ON) || \
00691     (PDL_PERIPHERAL_ENABLE_MFS11 == PDL_ON) || \
00692     (PDL_PERIPHERAL_ENABLE_MFS12 == PDL_ON) || \
00693     (PDL_PERIPHERAL_ENABLE_MFS13 == PDL_ON) || \
00694     (PDL_PERIPHERAL_ENABLE_MFS14 == PDL_ON) || \
00695     (PDL_PERIPHERAL_ENABLE_MFS15 == PDL_ON)
00696     #define PDL_PERIPHERAL_MFS_ACTIVE
00697 #endif
00698 
00699 // Activate code in mft_frt.c if one or more are set to PDL_ON
00700 #if (PDL_PERIPHERAL_ENABLE_MFT0_FRT == PDL_ON) || \
00701     (PDL_PERIPHERAL_ENABLE_MFT1_FRT == PDL_ON) || \
00702     (PDL_PERIPHERAL_ENABLE_MFT2_FRT == PDL_ON)
00703     #define PDL_PERIPHERAL_MFT_FRT_ACTIVE
00704 #endif
00705 
00706 // Activate code in mft_ocu.c if one or more are set to PDL_ON
00707 #if (PDL_PERIPHERAL_ENABLE_MFT0_OCU == PDL_ON) || \
00708     (PDL_PERIPHERAL_ENABLE_MFT1_OCU == PDL_ON) || \
00709     (PDL_PERIPHERAL_ENABLE_MFT2_OCU == PDL_ON)
00710     #define PDL_PERIPHERAL_MFT_OCU_ACTIVE
00711 #endif
00712 
00713 // Activate code in mft_wfg.c if one or more are set to PDL_ON
00714 #if (PDL_PERIPHERAL_ENABLE_MFT0_WFG == PDL_ON) || \
00715     (PDL_PERIPHERAL_ENABLE_MFT1_WFG == PDL_ON) || \
00716     (PDL_PERIPHERAL_ENABLE_MFT2_WFG == PDL_ON)
00717     #define PDL_PERIPHERAL_MFT_WFG_ACTIVE
00718 #endif
00719 
00720 // Activate code in mft_icu.c if one or more are set to PDL_ON
00721 #if (PDL_PERIPHERAL_ENABLE_MFT0_ICU == PDL_ON) || \
00722     (PDL_PERIPHERAL_ENABLE_MFT1_ICU == PDL_ON) || \
00723     (PDL_PERIPHERAL_ENABLE_MFT2_ICU == PDL_ON)
00724     #define PDL_PERIPHERAL_MFT_ICU_ACTIVE
00725 #endif
00726 
00727 // Activate code in mft_adcmp.c if one or more are set to PDL_ON
00728 #if (PDL_PERIPHERAL_ENABLE_MFT0_ADCMP == PDL_ON) || \
00729     (PDL_PERIPHERAL_ENABLE_MFT1_ADCMP == PDL_ON) || \
00730     (PDL_PERIPHERAL_ENABLE_MFT2_ADCMP == PDL_ON)
00731     #define PDL_PERIPHERAL_MFT_ADCMP_ACTIVE
00732 #endif
00733 
00734 // Activate NMI code in exint.c if one or more are set to PDL_ON
00735 #if (PDL_PERIPHERAL_ENABLE_NMI == PDL_ON)
00736     #define PDL_PERIPHERAL_NMI_ACTIVE
00737 #endif
00738 
00739 // Activate code in ppg.c if one or more are set to PDL_ON
00740 #if (PDL_PERIPHERAL_ENABLE_PPG == PDL_ON)
00741     #define PDL_PERIPHERAL_PPG_ACTIVE
00742 #endif
00743 
00744 // Activate code in qprc.c if set to PDL_ON
00745 #if (PDL_PERIPHERAL_ENABLE_QPRC0 == PDL_ON) || \
00746     (PDL_PERIPHERAL_ENABLE_QPRC1 == PDL_ON) || \
00747     (PDL_PERIPHERAL_ENABLE_QPRC2 == PDL_ON)
00748     #define PDL_PERIPHERAL_QPRC_ACTIVE
00749 #endif
00750 
00751 // Reset Cause
00752 #if (PDL_PERIPHERAL_ENABLE_RESET == PDL_ON)
00753     #define PDL_PERIPHERAL_RESET_ACTIVE
00754 #endif
00755 
00756 // Real Time Clock
00757 #if (PDL_PERIPHERAL_ENABLE_RTC == PDL_ON)
00758     #define PDL_PERIPHERAL_RTC_ACTIVE
00759 #endif
00760 
00761 // Unique ID
00762 #if (PDL_PERIPHERAL_ENABLE_UID == PDL_ON)
00763     #define PDL_PERIPHERAL_UID_ACTIVE
00764 #endif
00765 
00766 // Activate code in wc.c if one or more are set to PDL_ON
00767 #if (PDL_PERIPHERAL_ENABLE_WC == PDL_ON)
00768     #define PDL_PERIPHERAL_WC_ACTIVE
00769 #endif
00770 
00771 // Activate code in wdg.c is set to PDL_ON
00772 #if (PDL_PERIPHERAL_ENABLE_HWWDG == PDL_ON) || \
00773     (PDL_PERIPHERAL_ENABLE_SWWDG == PDL_ON)
00774     #define PDL_PERIPHERAL_WDG_ACTIVE
00775 #endif
00776 
00781 #define PDL_UTILITY_ENABLE_I2C_POLLING_AT24CXX    PDL_OFF
00782 #define PDL_UTILITY_ENABLE_I2C_INT_AT24CXX        PDL_OFF
00783 #define PDL_UTILITY_ENABLE_CSIO_INT_S25FL127S     PDL_OFF
00784 #define PDL_UTILITY_ENABLE_UART_PRINTF            PDL_OFF
00785 
00790 #define DEBUG_PRINT
00791 
00792 #endif // __PDL_USER_H__
00793 
00794 /******************************************************************************/
00795 /* EOF (not truncated)                                                        */
00796 /******************************************************************************/