PDL for FM0+  Version1.0
Peripheral Driverl Library for FM0+
C:/pdl_v10/library/driver/clk/clk.c File Reference
#include "clk.h"
Include dependency graph for clk.c:

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Functions

void Clk_IrqHandler (void)
 Clock Stabilization Interrupt Handler.
en_result_t Clk_Init (stc_clk_config_t *pstcClk)
 Initialize system clock according to user configuration.
en_result_t Clk_EnableHscr (boolean_t bBlock)
 Enable high speed CR.
en_result_t Clk_DisableHscr (void)
 Disable Main Clock.
en_result_t Clk_EnableMainClock (boolean_t bBlock)
 Enable Main Clock and wait until it is stable.
en_result_t Clk_DisableMainClock (void)
 Disable Main Clock.
en_result_t Clk_EnableSubClock (boolean_t bBlock)
 Enable Sub Clock.
en_result_t Clk_DisableSubClock (void)
 Disable Sub Clock.
en_result_t Clk_EnablePllClock (boolean_t bBlock)
 Enable PLL Clock.
en_result_t Clk_DisablePllClock (void)
 Disable PLL Clock.
en_result_t Clk_SetSource (en_clk_source_t enSource)
 Set Clock Source.
en_result_t Clk_PeripheralClockEnable (en_clk_gate_peripheral_t enPeripheral)
 Enables the clock gate of a peripheral.
boolean_t Clk_PeripheralGetClockState (en_clk_gate_peripheral_t enPeripheral)
 Read the clock gate state of a peripheral.
en_result_t Clk_PeripheralClockDisable (en_clk_gate_peripheral_t enPeripheral)
 Disables the clock gate of a peripheral.
en_result_t Clk_PeripheralSetReset (en_clk_reset_peripheral_t enPeripheral)
 Set reset bit a peripheral.
en_result_t Clk_PeripheralClearReset (en_clk_reset_peripheral_t enPeripheral)
 Clear reset bit a peripheral.

Variables

stc_clk_intern_data_t stcClkInternData
 Store the internal data of clock.

Detailed Description

A detailed description is available at Clock Module description

History:

  • 2014-02-24 1.0 Edison Zhang First version.

Definition in file clk.c.